[Tig] new pixels
Thu Feb 14 17:39:15 GMT 2002
From: "James Fancher" <fancher at mediaone.net>
> ... It will be a
> long time (10 years and maybe never) before the die resolution could be
> doubled to produce a 4K chip at the 4/3 inch size.
I saw a 3840 x 2160 (ring a bell?) full-spectrum CMOS sensor at the
Photonics conference in San Jose a couple of weeks back. No availability
information at the moment. It cost $2,000,000 in NRE's to develop in about
We know very little about the Foveon process, so it's hard to say how well
they can scale.
The conventional CMOS sensor is based on a photodiode array and gating logic
(passive pixel, kinda-like modern DRAM's as far as scanning) or a
photodiode/amplifier array with a switch (active pixel sensor). Obviously
the passive pixel design has a greater fill factor (percentage of active
sensing element with respect to overall pixel area). These are some of the
variables that determine the performance of a sensor. Passive designs are
cheap and fast (optically) because they have very nice fill factors.
However, noise performance can suffer due to the transport of low-level
photodiode signals around the die ... the bigger the array and the faster
the frame rate...
Active pixel designs seem to be taking the lead in high quality imaging.
They offer the possibility of intelligence at the pixel level and are
generally quieter. Having said that, CMOS imagers still don't compare to
high-end (astronomy class) imagers when it comes to noise performance. At
typical still photo sensitivities of 30 microVolts/electron good CMOS
imagers will remain flat at about 20 electrons of noise out beyond 100MHz of
operatinon. In contrast to this, high-end CCD's start out at about 2
electrons and linearly go up to about 8 e- at 25MHz continuing on
exponentially thereafer. At about 100 MHz they tend cross the CMOS 20 e-
noise performance level and get wost from there if not cooled, etc. CMOS
does promise higher operating frequencies at comparatively low noise levels
and better scalability. The current state of the art seems to be the 0.5
micron process and 0.25 micron is just around the corner. The writing is
most definetly on the wall.
I don't yet understand how Foveon physically form the required three
photodiodes. On a conventional CMOS imager the single photodiode is formed
on a plane normal to incident rays on a Silicon Oxide layer. The Foveon
sensor seems to rely on penetration into silicon oxide to sense three
wavelengths (aprox. red = 650nm, green = 510 nm, blue = 440 nm). Do they
have a way to form parallel isolated planes of SiO2 with the required
absorption layer to form a photodiode? I don't know. If the geometry is
such that the pixel area is shared among three photodiodes fabricated at
different sensing depths, then the effective fill factor for each color
components is (presumably) 1/3 of that of a full-spectrum sensor. Also, on
first inspection I can't see this being an active pixel design, there would
simply be too much supporting geometry around each pixel to achieve a decent
fill factor. These scenarios would explain the slow rating of 100 ISO
(modern TV cameras are somewhere in the 200 to 400 ISO, depending on who you
The bottom line, I guess, for professional use, is how they compare to a
good 3 imager/prism construct. I would like to thing that, given the
current process capabilities, there might still be an significant advantage
for the multi-imager approach.
Anyhow, back to chopping wood...
eCinema Systems, Inc.
ecinema at pacbell.net
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